Current NVM implementations such as Floating Gate, eFuse, and Anti-Fuse don’t use standard logic devices (standard cells) for their bit cells.  Instead, they use a proprietary structure for storing data.  As a result, these technologies require extensive characterization and qualification efforts to ensure reliable functioning of the chips that they are being integrated into.

The innovative Fuse (i-Fuse) from Attopsemi uses standard logic devices (standard cells) for the OTP bit cell.  Because the elements of the bit cell have been qualified already by the foundry, i-Fuse doesn’t require extensive qualifications.  This results in a fast time to market for new process technologies, and higher reliability.

For advanced CMOS processes (40nm and smaller), many current NVM technologies face significant challenges.  Even if they managed to get qualified on these advanced nodes, they often require bit cell redundancy and/or error correction schemes to compensate for failing bit cells during mass production.  As i-Fuse uses the logic devices which are qualified and provided as standard components from foundries, it doesn’t have the reliability and retention issues which other NVM technologies have.  It’s safe to claim that the i-Fuse from Attopsemi is the only OTP technology that doesn’t require an error correction scheme for processes as small as 7nm.  It’s safe to assume that this will count for more advanced future CMOS processes as well.

For more information about Attopsemi i-Fuse contact us here.